The answer is No!
The link
http://www.eecs.berkeley.edu/~keutzer/
Background
In the sputtering days of CPU Architecture, just after the millenium, I remember KK (and Berkeley in general) as a different voice as to which directions to take for future CPUs. Effectivelly here are a few arguments of the time (*):
- we are now in a hardware cycle as opposed to a software cycle
- the next step in MIPs is NOT reached by increasing the clock
- instead programmable logic or FPGA or hardware or ASIP (Application Specific IP)
- hurray for configurable core (typ. tensilica, then stretch)
- hurray hooray for reconfigurable computing (all dead).
Jump to 2015. As I am going through my notes on possible architecture trends (of interest to this Blog), I have 2 KK papers that I want in electronics format. Google the paper name + author and got nothing. Lost in the ozone. Okay I will scan them.
To cut a long story short, the KK I found is not the one I had in mind(*), but still an exciting guy to follow..
Anyway, here is his web page; among other things, KK mentions that he lost money with Catalytic, sorry, I contributed to that Kurt!
Here is his current interest :
Exploring Design Patterns for Parallel Computing
which is somehow related to this Blog.
I downloaded 2 papers:
- how to map recursivity in hardware
- speculation.
And the other papers are good too!
(*) as I remember; I might be confused, not sure if KK was leading all that;
References
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