DSPs - Archives
- The DSP Historian (see below)
- 1978 - 1987: the call-Up
- 1988 - 1995
- 1996 - 2004
- 2004 - Today
- Pre History
The goal of this section is to go through all the papers having for topic "the DSP uP chips". This will become clearer as we go in order of things.
Background
The knowledge of " History of DSP uP chips" is a major tool in my "alternative world" methodology to develop AS-DSP IP. As explained elsewhere I believe that anything after 1990 has little value compared to whatever happens before. Hence the "History of DSP uP chips" become 2 major fields:- before 1990: the chips ans architecture to know
- after 1990: the field of ideas: sounding board, the mistakes, the real advances, etc..
Hence, the issue becomes: where is the best story? "who is the best DSP historian?"
Anything in my garage?
I will do the usual and go through my stash. In one folder I found stuff which should be available on the web, but not always free.
- Noted, in a 10 page paper [1],
- the first generation dsp (amd2900 and TI C10) followed by the 2nd generation (C25, dsp16). This is so wrong that you have to be admirative of the author(a lateral thinker? an hyperspace traveller?).
- Anyway, the point here is that by studying the history of DSPs, the architect is obliged to classify (by generation, by features) and hence make choice, which as we all know, the lifeline of a DSP architect. If you cannot even classify DSPs don't bother.
- Also noted are references to the pipeline, including the mind-boggling <data stationary versus time stationary>. This, I believe, is a complete red herring but in the world of free world DSP, anything is fair and square.
- OOh, and the DSP32C has a reservation table!!
- Finally, another "gem" is Edward Lee's "interleaved pipelined" architecture. Hum?
- Speaking about Edward Lee, not only he is the grand father of many things (see BDT) but also the father of the classical paper[2,3], a first, dated 1988 < programmable DSP architectures>. If you have access to the paper, you can stop here.
- There is an IEEE micro version dated 1990 [4], in which Lee conservativly dropped the architecture term.
- In these days, only a few people could risk using the term.(see MPR oct 1989)
- In my case, Lee was was far from being the first one. Since 1978, I had already written 4 different versions of History of DSP chips including a 5m long mural, so Lee was of little value.
- At this stage it is worth mentioning the TRILOGY (Will, Gene, Jeff). What where they doing in 1988?For different reasons, none of them had written"THE REFERENCE".
- Jeff: obviously, being a student of Lee, postdate his work.
- Gene: being in full war with his competitors, he was not in the position to write objective reports. Still, good grunting noise could be heard at TI conferences.
- Will: I came across his first(?) report circa 1986. Primarily a marketing document, but in these days it was a technical gem.
- Following this, here are much more recent papers, freely available, all being university courses on DSP .
- With the title, Special Purpose Digital Processors (DSP) [5], a new type of acronym is introduced: the warped acronym. Why not? e.g. General Purpose Processor (CPU). It is a rather exhaustive 29 pages lecture note document from TUHH.
- Less exhaustive a Texas loaded ppt from Austin[6]
- A french in french 144 slides pdf from Irisa [7]. Note the T.O.C is perfect for a classical story of DSPs.
- I. Introduction
- II. Architectures MAC/Harvard
- III. Evolutions des DSP
- IV. Flot de développement (Flow)
- Finally [8] is a french paper in English from 2002. The authors are from McGill.
Gene's law
First for the not so good.
- Here is the lesson for us all architects: we DON'T KNOW HOW TO limit ourselves to history. It is always past, present, future. Extrapolation is what sells the paper and 9 out of 10 we are wrong.
- Unfortunatly this paper was badly timed as Moore's law (speed) was going broke..
- Gene extrapolated for the 2010 and came with the 10GHz DSP .
- Myself, around that time I had papers extrapolating speed for CPU and embedded CPUs such that 2010:10G __ 2020: 20G__ 2030:30G for CPUs you see the trend. Embedded CPUs had a lower slope and were around 5G in 2010.
- Now, even better is the Moore analogy. Little known but true, in multiple interviews circa 1980 Moore explained that with ultra VLSI, except for FFT he had no idea how to fill a logic chip. Good one, Gordon, no wonder you came up with the !IAPX432. In the same way, is Gene, turning the TI slogan on its head "limits to your imagination" here is the excerpt (Determining how to use that processing power effectively will require imagination that goes beyond conventional engineering methodologies.)...ooooh my oh my!
- In all fairness, the paper was called DSP trends, so...
- Moore's law is broken but I would not be so sure about Gene's Law
- Gene changed architecture by putting power consumption (and efficiency) to the forefront.
- This is what matters to me. Effectivelly it means than in the end, after all low hanging fruits are gone, there is only 1 technique left to improve efficiency: hardwired is replacing software. Customization is replacing cpu clock.{at this stage parallelism and multicore is just an implementation detail}
- Gene extrapolated the 50 GIPS DSP which did happen and even by today seems pretty tame.
- Gene mentionned a lot of stuff, details that I picked up and in the end, this is it. MY MOST RECENT PAPER ON THIS TOPIC WITH ANY VALUE.
From Lee to BDT
By the 1990s, Jeff Bier was starting an exceptional business <www.BDTI.com> B standing for Berkeley (see the story of B&B elsewhere). As part of his duties to the DSP community at large, Jeff was given lectures on DSP chips. So if you've read Lee's seminal paper the next logical step is a Jeff's paper. Which one? No idea, I have 41 in my stash. Even Jeff does not know how many he made so better go the BDTI web site.
Also, there is much more to BDTI than DSP chips history and trends. They are THE reference in DSP benchmark (see elsewhere).
Also, there is much more to BDTI than DSP chips history and trends. They are THE reference in DSP benchmark (see elsewhere).
Krishna Yargalada
By 1996, BDT had the monopole of "DSP chips - history and trends". Serious talk about breaking it, was heard in congress. Courageously Krishna Yargalada attempted to infiltrate DSP conferences with his own version[10] but t,hinking about it, it was a clever disguise to launch Hellosoft in what became the big revolution of our world of DSP "outsourcing assembly to India" {see elsewhere}.
Henry Davis
Hi Henry!
Robert Cushman and the EDN DSP directory
From 1981 to 1988(?), Robert Cushman, a major contributor to EDN, wrote many articles on DSP. He put together the first EDN (microprocessor-like) DSP directory in 1987. I have all of them till 2008. Going through them in order, gives an exceptional view of history.
THE UBER REFERENCE
Noted with pleasure that a lot of papers put as reference the BDTI classical book.
Phil Lapsley, Jeff Bier, Amit Shoham, Edward A. Lee , “DSP Processor Fundamentals: Architectures and Features,” IEEE Press, 1996.
This book is THE BIBLE reference for DSP architect (see elsewhere). It is much much more than an introduction to DSP chips.
Phil Lapsley, Jeff Bier, Amit Shoham, Edward A. Lee , “DSP Processor Fundamentals: Architectures and Features,” IEEE Press, 1996.
This book is THE BIBLE reference for DSP architect (see elsewhere). It is much much more than an introduction to DSP chips.
References
- <honestly I dont know; lost in history>
- Edward Lee "Programmable DSP Architectures Part 1" IEEE ASSP oct1988
- Edward Lee "Programmable DSP Architectures Part 2" IEEE ASSP jan1989
- Edward Lee "Programmable DSPs - a brief overview" IEEE Micro oct1990. This is essentially the intro of paper 1 + an excellent summary table.
- F. Mayer-Lindenberg, "Special Purpose Digital Processors (DSP)" TUHH (Hamburg University) lecture notes, dated ?
- Brian L, Evans "Introduction to DSP" University of Texas, Austin
- <http://www.irisa.fr/R2D2> Olivier Sentieys, IRISA, 2005
- Benoit Champagne, fabrice Labreau "An introduction to Digital Signal Processors" Compiled 2002
- Gene Frantz "DIGITAL SIGNAL PROCESSOR TRENDS", IEEE micro nov-dec 2000 p.52
- Krishna Yagarlada "DSP chips for communications" which conf?? 2003?? (see excellent slide)
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This is technical slide, illustrating different architecture choices !! |
Editor notes: no links are given as they become obsolete. Google keywords instead!
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